Combinational logic Essay Example

Combinational Logic

TTL means the Transistor-Transistor Logic while CMOS means the Complementary MOS. Both logic families have the characteristic of fan-in and fan out. Fan-in determines the inputs a logic gate can handle while fan-out determines the circuits a gate can drive. Power dissipation refers to the power dissipated when the circuits change from one state to another. Propagation delay refers to the time taken by a logic family for changes in input to appear during the output (EE2301, 3).

The TTL logic family can handle circuit fan-in of one, two, three, four or eight inputs. If it requires more than eight, the NAND network must be applied. Fan-out of the TTL has just two values, one for the high outputs and the other the low outputs. On the other hand, the CMOS logic gate has two inputs. The CMOS fan-out is greater than 50 as the input requirement of the CMOS logic family is nil (˜pA). The CMOS capacitance require a strong voltage for charging and discharging the inputs during the logic transitions. Thus, the fan-out of the CMOS also can affect the propagation delay time.

The propagation delay is measured through the reference voltage level Vref. The standard turn on delay for TTL NAND gate is 7ns while the standard turn-off delay for the TTL NAND gate is 11 ns. Thus, the average propagation delay time is tp provided through tp = (tPHL + Tplh) / 2. On the other hand, the propagation delay time for the CMOS devices is long based on the high output impedance (Kharate, 38). The typical delay time for the CMOS is 60 nsec for the VDD = 5 V, while 25 nsec = to VDD= 10 V. The rise and fall transition time for the time of transition is at average 70 nsec.

Power dissipation of TTL IC’s is mainly 40 mW while the power dissipation of the CMOS IC is typically 25 nW. Thus, the CMOS has a low dissipation compared to the TTL Logic family. However, the power dissipation of the CMOS family during the switching process on dynamic power dissipation may increase leading to a higher power dissipation compared to the TTL logic family (Kharate, 17).

CMOS has a high noise immunity and low power dissipation, which makes them more applicable in large-scale integrated circuits. On the other hand, the TTL should be used in circuits that have or need a high switching speed, less noise and a current (improved) driving capability. CMOS is the most suitable and currently used since it has a low power consumption, and higher density linked to the low propagation delay time (EE2301, 5).

Works Cited

EE2301. «Experiment 3: ttl and CMOS Characteristics.» (2010): 1-24. https://www.classe.cornell.edu/~ib38/teaching/p360/lectures/wk09/l26/EE2301Exp3F10.pdf.

Kharate, G, K. Digital Electronics (n.d.): 1-55. Oxford University Press.